About System Design Concepts
System Design Concepts, Inc. was founded in 2001 by Tim A. Schreyer.
Our original mission was to publish and teach the course
Concepts of Signal Integrity Design
to electrical engineers and technicians involved in the design and
development of computers and other digital electronic systems.
Since then we have expanded our scope. Our products and services
now include custom software and custom videos, especially those with
an educational purpose. We also develop computer tools to help
automate your day-to-day data entry and analysis tasks. And on our
website, we provide pointers to educational resources and we offer
other free tools. Locally in southwestern Colorado, we provice
computer support services for homes and small businesses.
And by the way, everything on this website was developed in-house.
If you see anything you like, please let us know; we may be able to
help you develop something similar for your business.
System Design Concepts' office is located in Chromo, Colorado,
south of Pagosa Springs.
About our Logo
The SDC logo is based on one of the printed circuit board design
techniques that is taught in our
Concepts of Signal Integrity Design
class. Sometimes, especially when using CMOS
circuitry with large fanout, (large number
of components connected to a single trace),
it is necessary to balance the loading effects of multiple
cicuit branches. This can be done by lengthening the printed circuit
board traces that run to some of the components. This lengthening
is achieved by routing the trace in a serpentine fashion.
This is one of the techniques that came into use in the 1990's
on systems running at speeds of
about 100 MHz. Our logo is meant to illustrate the
serpentine technique.
The metallic look of our logo was achieved using a three-dimensional
animation program called VueTM, from
e-on software.
Rendering a picture in 3-D is very different from drawing with the
more-familiar 2-D drawing programs. Instead of drawing a picture,
you create a model of each item in your picture, and then you position
and place the models in 3-dimensional space. This is similar to
positioning actors and props on a stage. In addition to the items in
your picture, you also place a camera and one or more light sources
into your 3-D space.
When rendering the picture, the software simulates a single ray of
light, travelling from a light source, bouncing off of an object in
the picture, continuing to the camera and through its lens, until
it finally reaches a single point on the camera's digital film.
This process is then repeated for every light source, for every
object in the picture, and for every pixel on the digital film.
As you might imagine, there are a lot of light rays that must be
computed! It can take several minutes to render a single scene,
or an hour or more to render a short animation.
But the realistic look of the final picture makes it well worth
the wait.
(For efficiency, the light rays are actually traced in reverse,
starting at the camera's film plane and working backwards toward
the light source. Working in reverse is more efficient because
the software does not waste time on light rays that never reach
the film plane).
The earliest Ray-tracing algorithm was developed
by Turner Whitted in 1979, and it was an extension of an earlier
technique called ray-casting developed
by Arthur Appel in 1968. (Source:
Wikipedia).
Back then, the calculations required
the use of a supercomputer. These days, you can achieve the same
results, or better, using a laptop computer!
Producing the SDC logo took roughly one day. Developing and
positioning the graphical elements was the easy part. The
time-consuming part was experimenting with positions for the
camera and the light sources, to make the reflections look just
right.
About our founder

Above Argentina's Upsala Glacier
Tim A. Schreyer, "freelance inventor",
is a senior electrical engineer with a lot of
hobbies.
He worked for 13 years for Intel Corporation, where
he was a member of the Senior Engineering Staff at Intel's system
division in Hillsboro, Oregon. While at Intel, Tim
developed strategies to manage signal integrity, electromagnetic
interference and thermal effects on computer
motherboards. He developed classes and taught them to
engineers and technicians, and he managed a small engineering
group that used his design strategies to develop computer motherboards.
Tim was an active member in teams that developed the
Pentium® Processor "backside" cache bus,
PCI, AGP and other system bus specifications.
Although primarily an electrical engineer, Tim's work and interests
have led him to do quite a bit of computer programming, and
he has learned and used more than a dozen computer languages throughout
his career. The languages he has learned include
earlier languages like Fortran-77, Univac Assembly, Cray Assembly,
Motorola 6800 Assembly, Modula-2, AWK, C and Perl as well as more
recent languages like C++, Visual Basic, Visual C++, Visual C#,
SQL, Python, PHP and ASP.
His current "favorite" languages are Visual C# and Microsoft Excel
(which he naively considers to be a programming language).
Tim received his Ph. D. in electrical engineering in 1989 from
Stanford University, where he conducted research on chip-level
interconnect performance on VLSI integrated circuits. Tim's
education and career give him a broad background in integrated
circuit design, system design, solid-state physics, electromagnetic
fields theory,
mathematics, computer programming and business administration.
Tim's hobbies include barbershop quartet singing, landscape
photography and videography, hiking, backpacking, and search & rescue.
He has 20 years experience backpacking in the Pacific Northwest and
American Southwest, and at last count, he has travelled overseas
to 18 countries. Tim was one of the founding officers for
Colorado Mounted Rescue,
and he currently volunteers
as a searcher and past-chairman of
Upper San Juan Search And Rescue, Inc.
in Pagosa Springs, Colorado.
Tim's Publications
The Effects of Interconnection Parasitics
on VLSI Circuit Performance,
Tim A. Schreyer, Ph. D. Dissertation, Stanford University, March 1989.
Simulation and Measurement of Picosecond Step Responses
in VLSI Interconnections,
T. A. Schreyer, Y. Nishi, and K. C. Saraswat, 1988 IEDM Tech. Digest,
pp.344-347
A Complete RLC Transmission Line Model
of Interconnect Delay,
T. A. Schreyer, Y. Nishi, and K. C. Saraswat,
Proc. Symposium on VLSI Technology (San Diego, CA),
May 1988, pp.95-96.
Specific Contact Resistivity Measurements of
RIE Etched Contacts,
T. A. Schreyer, A. J. Bariya, J. P. McVittie, and K. C. Saraswat,
Journal of Vacuum Science and Technology A, vol. 6, no. 3,
May/June 1988, pp. 1402-1406.
The Effect of a Superconducting Interconnection
on Circuit Performance,
T. A. Schreyer, P. J. Wright, and K. C. Saraswat,
Proc. IEEE Dev. Research Conference (Santa Barbara, CA),
June 1987, p. VIB-8.
Modeling and Measurement of Contact Resistances,
W. Loh, S. Swirhun, T. Schreyer, R. Swanson, and K. Saraswat,
IEEE Trans. Electron Devices, vol. ED-32, no. 3,
March 1987, pp. 512-524.
A Two-Dimensional Analytical Model of the
Cross-Bridge Kelvin Resistor
T. A. Schreyer, and K. C. Saraswat,
IEEE Electron Device Letters, vol. EDL-7, no. 12,
Dec. 1986, pp. 661-663.
The Sidewall Resistor - A Novel Test Structure
to Reliably Extract Contact Resistivity,
W. M. Loh, P. J. Wright, T. A. Schreyer, S. E. Swirhun,
K. C. Saraswat, and J. D. Meindl,
Proc. IEEE Device Research Conference (Amherst, PA),
June 1986, also published in IEEE Electron Device Letters,
vol. EDL-7, no. 8, Aug. 1986, pp. 477-479.
Measurement and Extraction of Specific Contact Resistivity,
K. Saraswat, W. Loh, T. Schreyer, and S. Swirhun,
IEEE VLSI Multilevel Interconnect Conference (Santa Clara, CA),
June 1986, pp. 385-391.
Comparison of Test Structures Used for the
Measurement of Low Resistive Metal-Semiconductor Contacts,
T. Schreyer, S. Swirhun, W. Loh, K. Saraswat, and R. Swanson,
Proc. IEEE Workshop on Test Structures (Long Beach, CA),
Feb. 1986, pp. 8-23.
Two-Dimensional Simulations for Accurate Extraction of the
Specific Contact Resistivity from Contact Resistance Data,
W. M. Loh, S. E. Swirhun, T. A. Schreyer, K. C. Saraswat, and R. Swanson,
1985 IEDM Tech. Digest (Washington, D. C.), pp. 586-589.